Synopsys boosts chip design with GenAI Copilot, cutting workflows from days to hours and easing complexity for engineering teams.
Synopsys has expanded its Synopsys.ai Copilot, bringing new GenAI capabilities to semiconductor design. These tools help engineers manage rising chip complexity, shorten development cycles, and counter workforce shortages. Early users have reported dramatic improvements in speed, accuracy, and productivity.
The assistive GenAI features include a knowledge assistant and a workflow assistant. Together, they reduce ramp-up time for junior engineers by 30% and cut script generation from hours to minutes. When used with Synopsys PrimeTime, scripts can be generated up to 20 times faster. These gains allow engineers to work more independently while maintaining high design quality. The assistants are now available across Synopsys Cloud, already supporting more than 100 startups.
Creative GenAI capabilities push automation further with RTL and formal assertion generation. Early adopters have reduced verification cycles from days to hours, with accuracy intact. One AI infrastructure provider boosted engineering productivity by 35% after adopting automated formal testbench creation. In just 10 days, its team validated 10 separate design components, underscoring the speed and scalability of GenAI-driven workflows.
Synopsys is also advancing toward AgentEngineer, a multi-agent GenAI framework for chip design. This next phase aims to automate engineering workflows progressively, from single task execution to full adaptive decision-making. A prototype, built with Microsoft Discovery, was recently showcased at DAC 2025. Synopsys sees this as the foundation for autonomous engineering systems that reduce computational demands and enable faster, more efficient chip design.
